Multiple Stuck at fault model Analysis
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چکیده
This paper discusses an algorithm to model any given multiple stuck at fault as a single stuck at fault with the insertion of at most n+3 gates, where n is the multiplicity of the targeted fault. The application of this model in circuit optimization, fault diagnosis and testing of multiply testable faults is discussed with examples. Any arbitrary multiple fault in combinational and sequential circuits can be simulated and tested using the presented multiple fault model.
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